Integrated circuit package and method for fabricating same

Details Integrated circuit package and method for fabricating same Integrated circuit package and method for fabricating same

2008-03-18

2008-03-18

Tran, Long K. (Department: 2818)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Metallic housing or support

C438S124000, C438S125000, C257S666000, C257S704000, C257SE23128

Reexamination Certificate

active

11798417

ABSTRACT:
A process for fabricating an integrated circuit package includes: selectively etching a first side of a substrate thereby providing etched regions of the substrate to partially define at least a plurality of contact pads; adding a dielectric material to the etched regions of the substrate; selectively etching a second side of the substrate to further define at least the plurality of contact pads and thereby provide a package base of at least the contact pads and the dielectric; mounting a semiconductor die to the package base and connecting the semiconductor die to the contact pads; fixing a lid to the package base to cover the semiconductor die in a cavity between the lid and the package base; and singulating to provide the integrated circuit package.

REFERENCES:
patent: 4530152 (1985-07-01), Roche et al.
patent: 4685998 (1987-08-01), Quinn et al.
patent: 4812896 (1989-03-01), Rothgery et al.
patent: 5066831 (1991-11-01), Spielberger
patent: 5157480 (1992-10-01), McShane et al.
patent: 5200362 (1993-04-01), Lin et al.
patent: 5200809 (1993-04-01), Kwon
patent: 5214845 (1993-06-01), King et al.
patent: 5216278 (1993-06-01), Lin et al.
patent: 5221642 (1993-06-01), Burns
patent: 5273938 (1993-12-01), Lin et al.
patent: 5277972 (1994-01-01), Sakumoto et al.
patent: 5279029 (1994-01-01), Burns
patent: 5293072 (1994-03-01), Tsuji et al.
patent: 5332864 (1994-07-01), Liang et al.
patent: 5343076 (1994-08-01), Katayama et al.
patent: 5406124 (1995-04-01), Morita et al.
patent: 5424576 (1995-06-01), Djennas et al.
patent: 5444301 (1995-08-01), Song et al.
patent: 5457340 (1995-10-01), Templeton, Jr. et al.
patent: 5474958 (1995-12-01), Djennas et al.
patent: 5483099 (1996-01-01), Natarajan et al.
patent: 5578869 (1996-11-01), Hoffman et al.
patent: 5604376 (1997-02-01), Hamburgen et al.
patent: 5608267 (1997-03-01), Mahulikar et al.
patent: 5639990 (1997-06-01), Nishihara et al.
patent: 5640047 (1997-06-01), Nakashima
patent: 5641997 (1997-06-01), Ohta et al.
patent: 5646831 (1997-07-01), Manteghi
patent: 5650663 (1997-07-01), Parthasarathi
patent: 5683806 (1997-11-01), Sakumoto et al.
patent: 5696666 (1997-12-01), Miles et al.
patent: 5701034 (1997-12-01), Marrs
patent: 5710064 (1998-01-01), Song et al.
patent: 5710695 (1998-01-01), Manteghi
patent: 5777382 (1998-07-01), Abbott et al.
patent: 5894108 (1999-04-01), Mostafazadeh et al.
patent: 5976912 (1999-11-01), Fukutomi et al.
patent: 6001671 (1999-12-01), Fjelstad
patent: 6008068 (1999-12-01), Yamada
patent: 6057601 (2000-05-01), Lau et al.
patent: 6124637 (2000-09-01), Freyman et al.
patent: 6194786 (2001-02-01), Orcutt
patent: 6229200 (2001-05-01), McLellan et al.
patent: 6294830 (2001-09-01), Fjelstad
patent: 6306685 (2001-10-01), Liu et al.
patent: 6459163 (2002-10-01), Bai
patent: 6489557 (2002-12-01), Eskildsen et al.
patent: 6498099 (2002-12-01), McLellan et al.
patent: 6528877 (2003-03-01), Ernst et al.
patent: 6585905 (2003-07-01), Fan et al.
patent: 6635957 (2003-10-01), Kwan et al.
patent: 6762118 (2004-07-01), Liu et al.
patent: 7070340 (2006-07-01), Crane et al.
patent: 2003/0015780 (2003-01-01), Kang et al.
patent: 2003/0183920 (2003-10-01), Goodrich et al.
patent: 59-208756 (1984-11-01), None
Neil McLellan et al.; Leadless Plastic Chip Carrier With Etch Back Pad Singulation; U.S. Appl. No. 09/802,678; filed Mar. 9, 2001.

Affiliated with

Also associated with

Rating

Integrated circuit package and method for fabricating same does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Integrated circuit package and method for fabricating same, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Integrated circuit package and method for fabricating same will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3952057