Integrated-circuit package

Details Integrated-circuit package Integrated-circuit package

1992-08-03

1994-07-19

Picard, Leo P.

Electricity: electrical systems and devices

Housing or mounting assemblies with diverse electrical...

For electronic systems and devices

361744, 361792, 439 66, 439 91, 174255, 257686, H05K 702

Patent

active

053315146

ABSTRACT:
An object to the present invention is to provide an integrated-circuit package in which crosstalk can be reduced and impedance matching can be made. According to the present invention, conductive poles are grid-like arranged equidistantly in rows respectively in the vertical and transversal directions of an insulating substrate. The conductive poles are classified into signal conductive poles which are electrically connected to electrodes of the integrated circuit and the mother board, and earthed ground conductive poles arranged so as to adjacently surround the signal conductive poles.

REFERENCES:
patent: 4811082 (1989-03-01), Jacobs et al.
IBM Technical Disclosure Bulletin, Reduced Coupled Noise Technique for Engineering Changes, Mar. 1986, vol. 26, No. 10, pp. 4618-4619.
Kraus et al., IBM Technical Disclosure Bulletin, Metallized Ceramic and Multi-Level Hybrid Fan-Out Technique, Mar. 1984, vol. 26, No. 10A, pp. 5063-5064.
Norman Goldberg, "Design of Thin Film Multichip Modules," The International Journal for Hybrid Microelectronics, vol. 4, No. 2, Oct. 1981, pp. 289-295.
Takeshi Sekiguchi et al., "A Multi-Chip Packages GaAs 16.times.16 Bit Parallel Multiplier", Optoelectronics Laboratories, pp. 1-4.
Yasumasa Noguchi et al., "Analysis of Characteristics of the Shielded-Coplanar Waveguide by Conformal Mapping Method," Journal of Electro Communication Society, vol. J60-B, No. 8, 1977, pp. 561-566.

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