Integrated circuit package

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead

Reexamination Certificate

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Details

C257S686000

Reexamination Certificate

active

07923832

ABSTRACT:
An integrated circuit package includes a cover plate disposed on a substrate mounted with an integrated circuit chip thereon. The chip is formed with first solder pads coupled respectively and wiredly to pin terminals on the substrate, and second solder pads coupled respectively and wiredly to pinhole terminals in the cover plate, and includes a main circuit unit, a pin transmission unit interconnecting electrically first ports of a main circuit unit and the first solder pads, a pinhole transmission unit interconnecting electrically second ports of the main circuit unit, and a control unit coupled to the pin and pinhole transmission units, and operable to control operation of the pin and pinhole transmission units such that each first port is coupled to a selected first solder pad through the pin transmission unit and that each second port is coupled to a selected second solder pad through the pinhole transmission unit.

REFERENCES:
patent: 5662483 (1997-09-01), Park et al.
patent: 5953214 (1999-09-01), Dranchak et al.
patent: 6351392 (2002-02-01), Palaniappa
patent: 2007/0235856 (2007-10-01), Haba et al.
patent: 2008/0006924 (2008-01-01), Morita
patent: 2008/0099904 (2008-05-01), Chou et al.
patent: 2009/0113698 (2009-05-01), Love et al.
patent: 2010/0032820 (2010-02-01), Bruennert et al.

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