Integrated circuit package

Details Integrated circuit package Integrated circuit package

1979-06-18

1981-02-17

Tolin, Gerald P.

Electricity: electrical systems and devices

Electrostatic capacitors

Fixed capacitor

361398, 361399, 174 52H, 357 81, H05K 720

Patent

active

042518520

ABSTRACT:
Disclosed is a packaging structure wherein one or more integrated circuit semiconductor chips are mounted on membrane-like insulating members. The membrane-like members provide multilevel wiring and interconnection between the chip or chips and a secondary wiring structure. The packaging structure includes a module protective cap (preferably metal) and resilient means supported by said secondary wiring structure. The resilient means physically biases the semiconductor chip or chips against the module protective cap and also accommodate induced chip motion and variation. The packaging structure provides enhanced thermal, mechanical and electrical characteristics.

REFERENCES:
patent: 3011379 (1961-12-01), Corwin
patent: 3082327 (1963-03-01), Rice
patent: 3292240 (1966-12-01), McNutt
patent: 3323022 (1967-05-01), Da Costa
patent: 3325882 (1967-06-01), Chiow
patent: 3363146 (1968-01-01), Dijkmeijer
patent: 3487541 (1970-01-01), Boswell
patent: 3544857 (1970-12-01), Byrne
patent: 3614832 (1971-10-01), Chance
patent: 3662230 (1972-05-01), Redwantz
patent: 3689804 (1972-09-01), Ishihama
patent: 3757175 (1973-09-01), Kim
patent: 3780352 (1973-12-01), Redwantz
patent: 3781596 (1973-12-01), Galli
patent: 3805375 (1974-04-01), Lacombe
patent: 3911327 (1975-10-01), Murari
patent: 3999285 (1976-12-01), Lewis
patent: 4012832 (1977-03-01), Crane
IBM Tech. Discl. Bull., Vol. 21, No. 2, Jul. 1978, "Semiconductor Die With Wiring Skirt," Ecker and Olsen, p. 569.
IBM Tech. Discl. Bull., vol. 11, No. 3, Aug. 1968, p. 309, "Joining Semiconductor Chips . . . ", Kurtz.
IBM Tech. Discl. Bull., vol. 14, No. 10, Mar. 1972, p. 3090, "Multichip Packaging", Ehret, Haist, Spielmann.
IBM Tech. Discl. Bull., vol. 16, No. 3, Aug. 1973, p. 758, "Matched Expansion Chip Package", Van Vestrout.
IBM Tech. Discl. Bull., vol. 21, No. 11, Apr. 1979, p. 4425, "Processing PC Conductor Decals", Gazdik et al.
Module Package, IBM Tech. Discl. Bulletin, Vol. 18, No. 11, Apr. 1976, p. 3591, by Auletta.

Affiliated with

Also associated with

Rating

Integrated circuit package does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Integrated circuit package, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Integrated circuit package will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2265280