Integrated circuit multi-level interconnection technique

Details Integrated circuit multi-level interconnection technique Integrated circuit multi-level interconnection technique

1995-03-30

1997-09-02

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Specific identifiable device, circuit, or system

Integrated structure

327564, 326101, 257211, H01L 2500

Patent

active

056636776

ABSTRACT:
An improved integrated circuit conductor layout technique provides lower and upper conductor levels that bound circuit blocks and provide for power supply voltage distribution to the circuitry in the circuit blocks. The lower and upper conductor levels also provide for first and second groups of parallel signal conductors in wiring channels between circuit blocks. An intermediate conductor level is located between the lower and upper conductor levels, and conducts power supply voltages between adjacent circuit blocks. The power supply conductors formed in the intermediate conductor level also serve to isolate the signal conductors in the lower conductor level from the signal conductors in the upper conductor level (and vice-versa) in the wiring channel. This isolation typically improves the design of the integrated circuit by providing more reliable estimates of signal propagation in the wiring channels.

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patent: 5315182 (1994-05-01), Sakashita et al.
patent: 5350886 (1994-09-01), Miyazaki et al.
patent: 5416431 (1995-05-01), Strauss

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