Integrated circuit MOS capacitor using implanted region to chang

Details Integrated circuit MOS capacitor using implanted region to chang Integrated circuit MOS capacitor using implanted region to chang

1977-08-29

1981-02-03

James, Andrew J.

357 24, 357 23, 357 52, 357 14, H01L 2702, H01L 2978, H01L 2934

Patent

active

042491940

ABSTRACT:
An MOS capacitor for N-channel silicon gate integrated circuits employs a polycrystalline silicon layer as one plate, and a silicon oxide dielectric. The lower plate consists of a region which is implanted by an ion beam to produce a depleted region. This device has a constant capacitance regardless of gate voltage in normal operating logic levels.

REFERENCES:
patent: 3387286 (1968-06-01), Dennard
patent: 3591836 (1971-07-01), Booher
patent: 3740731 (1973-06-01), Ohwada et al.
patent: 3810125 (1974-05-01), Stein
patent: 3906539 (1975-09-01), Sauermann
patent: 3996658 (1976-12-01), Takei et al.
patent: 4031608 (1977-06-01), Togei et al.
patent: 4047215 (1977-09-01), Frye et al.
patent: 4115794 (1978-09-01), Delamoneda
IBM Technical Disclosure Bulletin; vol. 15, No. 9, Feb. 1973, by Lee et al. p. 2833.

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