Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor
Reexamination Certificate
2011-03-08
2011-03-08
Mulpuri, Savitri (Department: 2812)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
C438S015000, C438S107000, C438S108000, C438S025000, C438S051000, C257SE21499, C257SE21536, C257SE21538, C257SE21705
Reexamination Certificate
active
07901981
ABSTRACT:
Various methods for forming an integrated circuit micro-module are described. In one aspect of the invention, layers of an epoxy are sequentially deposited over a substrate to form planarized layers of epoxy over the substrate. The epoxy layers are deposited using spin coating. At least some of the layers are photolithographically patterned after they are deposited and before the next epoxy layer is deposited. Openings are formed in at least some of the patterned epoxy layers after they are patterned and before the next epoxy layer is deposited. An integrated circuit is placed within one of the openings. At least one of the epoxy layers is deposited after the placement of the integrated circuit to cover the integrated circuit. At least one conductive interconnect layer is formed over an associated epoxy layer. Multiple external package contacts are formed. The integrated circuit is electrically connected with the external package contacts at least in part through one or more of the conductive interconnect layers.
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Deane Peter
Johnson Peter
Smeys Peter
Ahmadi Mohsen
Beyer Law Group LLP
Mulpuri Savitri
National Semiconductor Corporation
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