Integrated circuit, method for manufacturing an integrated...

Details Integrated circuit, method for manufacturing an integrated... Integrated circuit, method for manufacturing an integrated...

2007-04-16

2010-06-08

Monbleau, Davienne (Department: 2893)

Active solid-state devices (e.g., transistors, solid-state diode

Integrated circuit structure with electrically isolated...

C257S002000, C257S004000, C257S040000, C257S522000, C257SE29087, C257SE31008, C438S095000, C438S421000, C438S900000

Reexamination Certificate

active

07732888

ABSTRACT:
According to one embodiment of the present invention, a memory cell array comprises a plurality of voids, the spatial positions and dimensions of the voids being chosen such that mechanical stress occurring within the memory cell array is at least partly compensated by the voids.

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Hussein, M. A., et al., “Materials' Impact on Interconnect Process Technology and Reliability,” IEEE Transactions on Semiconductor Manufacturing, vol. 18, No. 1, Feb. 2005, pp. 69-85.

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