Integrated circuit metallization technique

Details Integrated circuit metallization technique Integrated circuit metallization technique

1984-05-09

1985-04-30

Ramsey, Kenneth J.

Metal fusion bonding

Process

Metal to nonmetal with separate metallic filler

228124, 204192SP, 204192F, B23K 120, H01L 21285

Patent

active

045139059

ABSTRACT:
A process in the manufacture of integrated circuits in which a barrier layer of Cr or Ti is deposited in a partial atmosphere of N.sub.2 in an Ar sputtering gas on a layer of Si so that the N.sub.2 is incorporated in the Cr or Ti, after which conductor material such as gold, silver, low temperature eutectic or other high temperature solders, are deposited on the barrier layer. This barrier layer reduces migration of Si and Cr through and over the conductor material so that a wettable (bondable) surface is provided which results in greater bond strength and greater reliability when the die is attached to a bonding pad by the conventional heat treat method.

REFERENCES:
patent: 3609471 (1971-09-01), Seace et al.
patent: 3624894 (1971-12-01), Miller
patent: 3649803 (1972-03-01), Desmond et al.
patent: 3651562 (1972-03-01), Hambleton
patent: 3923470 (1975-12-01), Damsteeg et al.
patent: 4023725 (1971-05-01), Ivett et al.
patent: 4420110 (1983-12-01), McCullough et al.
Pepper "Shear Strength of Metal--SiO.sub.2 Contacts", NASA Technical Memo--78838, 11/6/1980.

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