Integrated circuit memory using fusible links in a scan chain

Details Integrated circuit memory using fusible links in a scan chain Integrated circuit memory using fusible links in a scan chain

1996-04-29

1997-10-14

Nguyen, Hoa T.

Excavating

371 221, G01R 3138

Patent

active

056779178

ABSTRACT:
An integrated circuit memory (140) includes programmable fuses (20) coupled to scannable flip-flops (25). The programmable fuses (20) and scannable flip-flops (25) are implemented in a scan chain, and are used to program specific information about the integrated circuit memory (140), such as for example, repair (redundancy) information, wafer lot number and wafer number, die position on the wafer, or any other information that would be useful during or after package testing.

REFERENCES:
patent: 4346459 (1982-08-01), Sud et al.
patent: 4853946 (1989-08-01), Elliott et al.
patent: 5337277 (1994-08-01), Jang
patent: 5365310 (1994-11-01), Jenkins et al.

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