Integrated circuit memory devices including programmed...

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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C365S094000, C365S185200

Reexamination Certificate

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07102926

ABSTRACT:
An integrated circuit memory device includes programmed memory cells and programmable and erasable memory cells. The memory device includes a first memory array block in which programmed memory cells are arranged and a second memory array block in which programmable and erasable memory cells are arranged. The programmed memory cells in the first memory array block may be programmed with predetermined data during a semiconductor manufacturing process, and may be mask read-only memory (ROM) cells. The programmable and erasable memory cells in the second memory array block may be programmed or erased with predetermined data after the semiconductor manufacturing process, and may be electrically erasable and programmable read-only memory (EEPROM) cells or flash memory cells.

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Rapport de Recherche Préliminaire (Search Report), FR 04 07708, May 23, 2005.
Notice to Submit a Response for Korean patent application No. 10-2003-0047417 mailed on Apr. 29, 2005.

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