Integrated circuit manufacturing method

Details Integrated circuit manufacturing method Integrated circuit manufacturing method

1980-05-05

1982-08-31

Ozaki, G.

Metal working

Method of mechanical manufacture

Assembling or joining

29577C, 148187, H01L 2122

Patent

active

043465129

ABSTRACT:
A method for forming bipolar semiconductor devices and compiementary metal-oxide semiconductor (CMOS) field effect devices on a single crystal substrate wherein source and drain contact regions of one of the CMOS devices is formed simultaneously with the formation of a base region of the bipolar device and source and drain contact regions of the other one of the CMOS devices are formed simultaneously with the emitter region of the bipolar device. Because the emitter region is formed with a relatively high doping concentration and since the source and drain contact regions are formed simultaneously with the same relatively high doping concentration, the process includes the step of covering the surfaces of these source and drain contact regions during thermal growth of a gate oxide on the portions of the surface of the semiconductor between the source and drain contact regions to prevent dopant in the source and drain contact regions from entering the surface of the semiconductor between source and drain contact regions during the thermal growth of the gate oxide.

REFERENCES:
patent: 3766637 (1973-10-01), Norris et al.
patent: 3983620 (1976-10-01), Spadea
patent: 4046606 (1977-09-01), Lambert
patent: 4138782 (1979-02-01), Dela Moneda et al.
patent: 4235011 (1980-11-01), Butler et al.
patent: 4280271 (1981-07-01), Lou et al.

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