Integrated circuit low leakage power circuitry for use with an a

Static information storage and retrieval – Addressing – Particular decoder or driver circuit

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365226, G11C 800

Patent

active

061669857

ABSTRACT:
In one embodiment, the present invention provides a circuit that includes a core circuit and a control circuit coupled to the core circuit. The control circuit reduces a leakage current in the core circuit when the core circuit is in a Sleep mode. The control circuit maintains a logic state of the core circuit when the core circuit is in a Drowsy mode.

REFERENCES:
patent: 5274601 (1993-12-01), Kawahara et al
patent: 5486774 (1996-01-01), Douseki et al.
patent: 5726562 (1998-03-01), Mizuno
patent: 5726946 (1998-03-01), Yamagata et al.
patent: 5764566 (1998-06-01), Akamatsu et al.
patent: 6009034 (1999-12-01), Manning

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