Integrated circuit layout

Details Integrated circuit layout Integrated circuit layout

1996-09-12

1998-09-01

Teska, Kevin J.

Boots, shoes, and leggings

364489, 364490, G06F 1750

Patent

active

058019596

ABSTRACT:
The invention quickly produces a dense layout for an integrated circuit that enables a smaller die to be used to implement the integrated circuit than would otherwise be the case, resulting in a desirable size reduction in the final packaged integrated circuit. The invention combines routing space estimation and adjustment (a technique similar to channel-based global routing) with area-based detailed routing, resulting in an approach that provides the benefits of both channel-based and area-based layout techniques while minimizing the disadvantages of those techniques.

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