Integrated circuit isolation using gold-doped polysilicon

Details Integrated circuit isolation using gold-doped polysilicon Integrated circuit isolation using gold-doped polysilicon

1969-12-03

1977-02-22

Larkins, William D.

357 48, 357 49, 357 50, 357 64, H01L 2704, H01L 2904, H01L 29167, H01L 2120

Patent

active

040094847

ABSTRACT:
A semiconductor device comprising monocrystalline semiconductor regions and a polycrystalline semiconductor region doped with gold and disposed between and adjacent to the monocrystalline regions. The high impedance appearing between the regions is utilized for isolating circuit elements which are formed in the monocrystalline regions.

REFERENCES:
patent: 3440114 (1969-04-01), Harper
patent: 3447235 (1969-06-01), Rosvold et al.
patent: 3448350 (1969-06-01), Yamashita et al.
patent: 3475661 (1969-10-01), Iwata et al.
Sah et al., "Effects of Multiply-Charged Gold Impurity . . . ", Applied Physics Letters, vol. 12, No. 4, 15 Feb. 1968, pp. 141-142.

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