Integrated circuit isolation structure and method for producing

Details Integrated circuit isolation structure and method for producing Integrated circuit isolation structure and method for producing

1975-11-28

1977-04-05

Ozaki, G.

Metal treatment

Process of modifying or maintaining internal physical...

Chemical-heat removing or burning of metal

148 15, 204129, H01L 21316

Patent

active

040160173

ABSTRACT:
A semiconductor device, such as a transistor, integrated circuit or the like, having a pattern of oxidized and densified porous silicon regions extending onto one of its major surfaces for isolating regions of the semiconductor is manufacturable by a relatively simple process. The process involves forming porous silicon regions in the surface of the semiconductor body such as a silicon wafer, in the areas where dielectric isolation between semiconductor devices is desired. The porous silicon regions are then oxidized at a temperature sufficient to completely oxidize the porous silicon. The oxidiation is such that the oxidized porous silicon extends above the surface of the semiconductor wafer. The oxidized porous silicon regions are then subjected to a temperature higher than the oxidizing temperature utilized in the previous step to cause the densification of the oxidized porous silicon regions. The result of this densification step is the collapse of the porous oxide to a dense structure which is substantially planar with the surface of the semiconductor wafer. This densified silicon dioxide structure has an etch rate which is substantially the same as thermally grown silicon dioxide.

REFERENCES:
patent: 3640806 (1972-02-01), Watanabe et al.
patent: 3919060 (1975-11-01), Pogge et al.

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