Integrated circuit interconnect method and apparatus

Details Integrated circuit interconnect method and apparatus Integrated circuit interconnect method and apparatus

1998-04-06

1999-12-14

Picardat, Kevin M.

Semiconductor device manufacturing: process

Including control responsive to sensed condition

Interconnecting plural devices on semiconductor substrate

438107, 438128, H01L 2144, H01L 2148, H01L 2150

Patent

active

060016612

ABSTRACT:
A method of packaging a semiconductor device (10) partitions a distribution substrate (20, 40) into regions (31-34) such that attachment points (22) for electrically coupling to the semiconductor device lie in a first region (31). A first set of conductors are routed from a portion of the attachment points to terminals in a second region (32). Another portion of the attachment points are assigned to available routing channels of the second region for disposing a second set of conductors across the second region to a third region (33). Partitioning improves routing efficiency without requiring objects to be located on grid points or restricting the angles of the routing channels.

REFERENCES:
patent: 4709468 (1987-12-01), Wilson
patent: 5148265 (1992-09-01), Khandros et al.
patent: 5561077 (1996-10-01), Terashima
patent: 5656549 (1997-08-01), Woosley et al.

Affiliated with

Also associated with

Rating

Integrated circuit interconnect method and apparatus does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Integrated circuit interconnect method and apparatus, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Integrated circuit interconnect method and apparatus will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-862527