Integrated circuit interconnect having dual dielectric intermedi

Details Integrated circuit interconnect having dual dielectric intermedi Integrated circuit interconnect having dual dielectric intermedi

1989-08-31

1991-12-03

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437189, 437229, 437235, 148DIG43, H01L 2190

Patent

active

050700375

ABSTRACT:
This invention comprehends a multilevel electrically conductive interconnect for an integrated circuit wherein an inventive feature of the interconnect is the intermediate dual dielectric layer between the non-contacting portions of the surrounding metal conductors. The dual dielectric layer consists of a first dielectric layer and a second dielectric layer preferably formed from a polyimide material. The dual dielectric layer provides a significant improvement in defect density and a substantially planarized surface for the deposition of the top conductor, thereby improving the reliability and integrity of the electrical interconnection and integrated circuit.

REFERENCES:
patent: 4199384 (1980-04-01), Hsu
patent: 4523372 (1985-06-01), Balda et al.
patent: 4723197 (1988-02-01), Takiar et al.
patent: 4825278 (1989-04-01), Hillenius et al.
patent: 4906592 (1990-03-01), Merenda et al.
"Delco Electronics Production Process Specification for the Deposition of a Single Dielectric Layer".

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