Integrated circuit insulator and method

Semiconductor device manufacturing: process – Chemical etching – Altering etchability of substrate region by compositional or...

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438694, 438697, 438725, H01L 21302

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active

058889051

ABSTRACT:
A intermetal level dielectrics with fluorinated (co)polymers of parylene (142) between metal lines (112-120), and vapor deposition method for the (co)polymerization followed by fluorination of the (co)polymers.

REFERENCES:
patent: 4946549 (1990-08-01), Bachman et al.
patent: 5268202 (1993-12-01), You et al.

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