Integrated circuit incorporating decoupling capacitor under...

Details Integrated circuit incorporating decoupling capacitor under... Integrated circuit incorporating decoupling capacitor under...

2006-08-28

2009-12-29

Louie, Wai-Sing (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Gate arrays

Having specific type of active device

C257SE27108

Reexamination Certificate

active

07638821

ABSTRACT:
A semiconductor device is composed of: an array of CMOS primitive cells provided in a circuit region; a power supply line extended along the array of the CMOS primitive cells and connected to the CMOS primitive cells; a ground line extended along the array of the CMOS primitive cells and connected to the CMOS primitive cells; a first decoupling capacitor provided under the power supply line; a second decoupling capacitor provided under the ground line. The first decoupling capacitor is formed of a PMOS transistor having a gate connected to the ground line. At least one of the source and drain of the PMOS transistor is connected to the power supply line. The second decoupling capacitor is formed of an NMOS transistor having a gate connected to the power supply line. At least one of the source and drain of the NMOS transistor is connected to the ground line.

REFERENCES:
patent: 5631492 (1997-05-01), Ramus et al.
patent: 5838047 (1998-11-01), Yamauchi et al.
patent: 6035111 (2000-03-01), Suzuki et al.
patent: 6339235 (2002-01-01), Takata
patent: 6467070 (2002-10-01), Kuroda et al.
patent: 6849906 (2005-02-01), Maeno et al.
patent: 2-241061 (1990-09-01), None
patent: 2241061 (1990-09-01), None

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