Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage
Reexamination Certificate
1999-11-23
2001-08-28
Kim, Jung Ho (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific identifiable device, circuit, or system
With specific source of supply or bias voltage
C327S404000
Reexamination Certificate
active
06281741
ABSTRACT:
FIELD OF THE INVENTION
This invention relates generally to integrated circuits (ICs) in which the voltage at a circuit node is clamped or limited.
BACKGROUND OF THE INVENTION
A typical prior art voltage clamp, as shown in
FIG. 1
, utilizes a single PMOS transistor T
1
to limit the voltage at output node N. In this circuit the output load, represented by resistor R
L
, is driven by a current source I. When the output voltage at node N exceeds the input voltage by V
th
(the threshold voltage of T
1
), T
1
turns on and begins to conduct current from node N to ground, effectively limiting the output voltage at node N to V
th
above the input voltage. Equivalent bipolar clamp circuits are also known in the prior art.
A significant disadvantage of the single-transistor clamp circuit arises from its limited transconductance, which in turn means that it does not turn on very hard; i.e., above V
th
the slope of its I-V characteristic is not as nearly vertical as desired. MOSFET transconductance is proportional to the gate width-to-length ratio (W/L). Since gate length is typically set by the design rules of a given IC process, increasing transconductance by a factor M generally implies increasing W by a similar factor. Unfortunately, this approach significantly increases the area of the MOSFET, area which is frequently at a premium in state-of-the-art, densely packed ICs. Once again, similar considerations apply to bipolar clamp circuits.
Thus, a need remains in the art for a voltage clamp IC which provides increased transconductance without significantly increased circuit area as compared to single-transistor clamp circuits.
SUMMARY OF THE INVENTION
In accordance with one aspect of my invention, an IC includes a clamp transistor for limiting the voltage at a circuit node and a current amplifier coupled across the input and output terminals (e.g., the source and drain of a MOSFET, or the emitter and collector of a bipolar transistor) of the clamp transistor. In one embodiment the current amplifier comprises a current mirror.
In accordance with another aspect of my invention, the direction of current through a load is controlled by means of dual-function transistor which also serves to provide current gain in the current mirror. In one embodiment, a differential line driver includes a pair of such dual-function transistors in its clamp circuits.
REFERENCES:
patent: 4849708 (1989-07-01), Brehmer et al.
patent: 5023489 (1991-06-01), Macbeth
patent: 5349245 (1994-09-01), Hughes et al.
patent: 5491437 (1996-02-01), Rincon et al.
patent: 5563553 (1996-10-01), Jackson
patent: 5625281 (1997-04-01), Lambert
patent: 5783952 (1998-07-01), Kazazian
P. E. Allen et al.,CMOS Analog Circuit Design, Saunders College Publishing, pp. 227-239 (1987).
N. Mohan et al.,Power Electronics: Converters, Applications and Design, John Wiley & Sons, pp.296-297 (1989).
Agere Systems Guardian Corp.
Kim Jung Ho
Urbano Michael J.
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