Integrated circuit including a test cell for efficiently testing

Details Integrated circuit including a test cell for efficiently testing Integrated circuit including a test cell for efficiently testing

1991-08-02

1994-05-03

Atkinson, Charles E.

Excavating

G06F 1100

Patent

active

053094441

ABSTRACT:
The present invention concerns an integrated circuit (1) comprising a standard cell (4), an application cell (2) and a test cell (3) designed in particular to store or to modify from outside the integrated circuit the value of communication signals passing between the standard cell and the application cell. The standard cell executing instructions provided on an instruction bus (3B4) by a program memory located in the application cell in response to an instruction address carried by an instruction address bus (3A4), the conductors of these buses constituting communication links. The integrated circuit further includes a branching circuit for replacing at least one erroneous instruction from the program memory with a replacement instruction previously stored in the integrated circuit in response to a predetermined state of the communication links.

REFERENCES:
patent: 4698588 (1987-10-01), Hwang et al.
patent: 4819234 (1989-04-01), Huber
patent: 4992934 (1991-02-01), Portanova et al.
patent: 5212693 (1993-05-01), Chao et al.
IBM Techical Disclosure Bulletin, vol. 25, No. 2, Jul. 1982, p. 709, New York, US; E. F. Hahn et al.: "VLSI testing by on-chip error detction".

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