Integrated circuit in complementary circuit technology

Details Integrated circuit in complementary circuit technology Integrated circuit in complementary circuit technology

1986-12-12

1988-07-26

Ozaki, George T.

Fishing, trapping, and vermin destroying

437 41, 357 42, H01L 21425

Patent

active

047600357

ABSTRACT:
An integrated circuit in complementary circuit technology comprising two field effect transistors (T1, T2) of different channel types with the first one (T2) mounted in a doped semiconductor body (1) having a first conductivity type and the other FET (T1) mounted in a semiconductor zone 2 of a second conductivity type which is arranged in said body. The object is to provide a protection against thermal overloads which can appear due to "latch up" influences when overvoltages at the one connecting region of the field effect transistor (T1) mounted in the semiconductor zone occur. This is accomplished by the mounting of a metal contact (12) on the surface of a semiconductor region (2') inserted into the semiconductor body 1 and doped oppositely thereto with such metal contact forming a Schottky diode (D) with the semiconductor region (2') which can be connected to the connecting region of the field effect transistor T1 mounted in the semiconductor region 2 whereas the semiconductor region (2') is electrically connected to the supply voltage (V.sub.DD). The circuits are applied in CMOS circuits.

REFERENCES:
patent: 4167747 (1979-09-01), Satou et al.
patent: 4300152 (1981-01-01), Lepselter
patent: 4435896 (1984-03-01), Parrillo et al.
patent: 4477310 (1984-10-01), Park et al.
patent: 4480196 (1986-10-01), Hinz et al.
patent: 4513309 (1985-04-01), Cricchi
Yang, "Fundamentals of Semiconductor Devices" McGraw-Hill Book Co., N.Y., 1978, pp. 138-139.

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