Integrated circuit high voltage protection

Details Integrated circuit high voltage protection Integrated circuit high voltage protection

1984-03-02

1986-08-12

Pellinen, A. D.

Electricity: electrical systems and devices

Safety and protection of systems and devices

Load shunting by fault responsive means

361 91, 357 2313, H02H 324

Patent

active

046059806

ABSTRACT:
Protection of the thin gate oxide of MOS field effect transistors from irreversible puncture due to undesired high voltages and currents, generated by electrostatic discharge through handling or otherwise, is provided by a two stage circuit that operates to shunt thousands or tens of volts around the protected transistors. A first stage, employing a thick field effect transistor, protects against the very high voltage. A second stage, employing a thin field effect transistor, protects against lower but still excessive voltage. The protection circuit is formed as part of an integrated circuit chip by surrounding the lead bonding pad to which the protected transistors are connected.

REFERENCES:
patent: 3395290 (1968-07-01), Farina et al.
patent: 3403270 (1968-09-01), Pace
patent: 3673427 (1972-06-01), McCoy et al.
patent: 3712995 (1973-01-01), Steudel
patent: 4061928 (1977-12-01), Kessler
patent: 4449158 (1984-05-01), Taira
patent: 4481521 (1984-11-01), Okumura
"Electrical Overstress/Electrostatic Discharge Symposium Proceedings", 1980, Reliability Analysis Center, pp. 73-80, EOS-2.
"Gate Protection of MIS Devices", Martin Lenzlinger, IEEE Transactions on Electron Device, vol. ED-18, No. 4, Apr. 1971.

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