Integrated circuit high voltage protection

Electricity: electrical systems and devices – Safety and protection of systems and devices – With specific current responsive fault sensor

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361 56, 361 91, 361111, H01L 2978, H02H 320

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047454504

ABSTRACT:
Protection of the thin gate oxide of MOS field effect transistors from irreversible puncture due to undesired high voltages and currents, generated by electrostatic discharge through handling or otherwise, is provided by a two stage circuit that operates to shunt thousands or tens of volts around the protected transistors. A first stage, employing a thick field effect transistor, protects against the very high voltage. A second stage, employing a thin field effect transistor, protects against lower but still excessive voltage. The protection circuit is formed as part of an integrated circuit chip by surrounding the lead bonding pad to which the protected transistors are connected.

REFERENCES:
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patent: 3403270 (1968-09-01), Pace et al.
patent: 3673427 (1972-06-01), McCoy et al.
patent: 3712995 (1973-01-01), Steudel
patent: 4061928 (1977-12-01), Kessler
patent: 4449158 (1984-05-01), Taira
patent: 4481521 (1984-11-01), Okumura
patent: 4527213 (1985-07-01), Ariizumi
patent: 4605980 (1986-08-01), Hartranft et al.
Lenzlinger, "Gate Protection of MIS Devices," IEEE Transactions on Electron Devices, vol. Ed-18, No. 4, Apr. 1971, pp. 249-257.
Keller, "Protection of MOS Integrated Circuits from Destruction by Electrostatic Discharge," pp. 73-80, Electrical Overstress/ Electrostatic Discharge Symposium Proceedings, 1980, Reliability Analysis Center, Rome Air Development Center.

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