Integrated circuit having three power bases and proportioned par

Details Integrated circuit having three power bases and proportioned par Integrated circuit having three power bases and proportioned par

1984-04-18

1986-09-23

Anagnos, Larry N.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307200A, 307200B, 307448, 307455, 307542, H03K 19003, H03K 19086, H03K 19094, H03K 1920

Patent

active

046137718

ABSTRACT:
A circuit integrated into a substrate and having improved noise immunity comprises logic gates for receiving and switching current from a first bus to produce a logic signal; a resistor for receiving and passing a small bias current from a second bus indicating the state of the logic signal; a transistor for receiving and passing a large drive current from a third bus in response to bias current; and the first bus has a relatively large parasitic coupling serially through the logic gates, substrate, and resistors to the second bus; while the first bus has a relatively small parasitic coupling serially through the logic gates, substrate, and transistor to the third bus.

REFERENCES:
patent: 3909636 (1975-09-01), Masaki
patent: 4085432 (1978-04-01), Varettoni
patent: 4278897 (1981-07-01), Ohno et al.
patent: 4347446 (1982-08-01), Price
patent: 4398106 (1983-08-01), Davidson et al.
patent: 4445051 (1984-04-01), Elmasry
patent: 4553049 (1985-11-01), Cha et al.

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