Integrated circuit having reprogramming cell

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular signal path connections

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Details

257203, 257210, 257211, 257758, H01L 2710, H01L 2348, H01L 2352, H01L 2940

Patent

active

058922490

ABSTRACT:
An integrated circuit is reprogrammable in metal using (a) a set of spare devices, and (b) separate arrays of spare rows and columns. The spare rows are formed in the top metal layer, and the spare columns are formed in the next to the top metal layer (for example, metal layers 4 and 5 of a 5 level metal process). Use of arrays of spare rows/columns facilitates silicon debug of the integrated circuit using FIB (focused ion beam) reprogramming without requiring FIB connections of more than 500 .mu.m.

REFERENCES:
patent: 4931946 (1990-06-01), Ravindra et al.
patent: 4961053 (1990-10-01), Krug
patent: 5214299 (1993-05-01), Gal et al.
patent: 5315230 (1994-05-01), Hively et al.
patent: 5459342 (1995-10-01), Nogami et al.
patent: 5578861 (1996-11-01), Kinoshita et al.
patent: 5608245 (1997-03-01), Martin

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