Integrated circuit having one-input terminal with selectively va

Details Integrated circuit having one-input terminal with selectively va Integrated circuit having one-input terminal with selectively va

1977-05-31

1978-09-19

Zazworsky, John

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307261, 307269, 328 62, H03K 1920, H03K 515

Patent

active

041157060

ABSTRACT:
An integrated circuit includes an input terminal to which a "1," "float" and "0" level input signals are selectively supplied; a clock pulse generator for generating a second clock pulse during the high level period of a first clock pulse and a third clock pulse during the low level period of the first clock pulse, and first and second latch circuits operated in response to the second and third clock pulses, respectively, of the clock pulse generator. The input terminal is connected through a resistor to the output of the first clock pulse.
The input terminal is also connected to the inputs of the first and second latch circuits. The integrated circuit generates three kinds of outputs whose logical states correspond to different levels of three input signals, respectively, which are selectively supplied to said input terminal.

REFERENCES:
patent: 3969633 (1976-07-01), Paluck et al.
patent: 4031410 (1977-06-01), Kikuchi
patent: 4059955 (1977-11-01), Prak

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