Integrated circuit having interconnect to a substrate and...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration

Reexamination Certificate

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Details

C257S187000, C257S197000, C257S001000, C257S001000

Reexamination Certificate

active

06555915

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to integrated circuits and more particularly to making contact between interconnect and substrate.
2. Related Art
Integrated circuits comprise transistors formed in active regions that are interconnected by interconnect layers. Typically, these interconnect layers are polysilicon or metal that are made in layers above the substrate. Active regions are formed in the substrate itself. A relatively simple connection that is commonly required in the integrated circuit is a source/drain of one transistor connected to a gate of another transistor. Typically, this occurs by providing an interconnect layer for making the connection from a layer that is above the gate. This requires area on the integrated circuit and thus is a factor in the overall size of the integrated circuit. Another type of contact that has been utilized is known as a buried contact in which polysilicon, which is the typical gate material, is in direct contact with the substrate for making contact between a source/drain and gate.
One of the difficulties and problems associated with buried contacts is that the substrate tends to be excessively etched in the area immediately adjacent to or at the edge of the polysilicon that was making contact to the substrate. This occurs because the opening to the substrate, and thus to the source/drain, must be made before the polysilicon is deposited. Thus the etch of the polysilicon that is used for the contact can create a substrate overetch problem.
Thus there is a need for contacts that do not require as much space as those of upper level interconnect and do not have the problems associated with buried contacts.


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Kameda et al., “Study of the current-voltage characteristics in MOS capacitors with Si-implanted gate oxide, ” Pergamon, Solid-State Electronics 43 (1999) pp. 555-563.
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