Integrated circuit having gates and active regions forming a...

Details Integrated circuit having gates and active regions forming a... Integrated circuit having gates and active regions forming a...

2007-06-12

2008-07-22

Wilczewski, M. (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Gate arrays

Having specific type of active device

Reexamination Certificate

active

07402848

ABSTRACT:
A semiconductor device includes a plurality of repeatable circuit cells connectable to one or more conductors providing at least electrical connection to the circuit cells and/or electrical connection between one or more circuit elements in the cells. Each of the circuit cells are configured having gates and active regions forming a grating, wherein, for a given active layer in the device, a width of each active region is substantially the same relative to one another, a spacing between any two adjacent active regions is substantially the same, a width of each gate is substantially the same relative to one another, and a spacing between any two adjacent gates is substantially the same.

REFERENCES:
patent: 5359226 (1994-10-01), DeJong
patent: 5612552 (1997-03-01), Owens
patent: 5742086 (1998-04-01), Rostoker et al.
patent: 6534805 (2003-03-01), Jin
patent: 6812534 (2004-11-01), Ishigaki et al.
M. Ishida et al., “A Novel 6T-SRAM Cell Technology Designed with Rectangular Patterns Scalable beyond 0.18 μm Generation and Desirable for Ultra High Speed Operation,” IEEE, 4 pages, 1998.

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