Integrated circuit having features to limit substrate current

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics

Reexamination Certificate

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C363S020000

Reexamination Certificate

active

10902233

ABSTRACT:
A technique includes forming a first well in a substrate and forming a second well in the substrate. The first well is electrically isolated from the second well. The technique includes forming an element in the second well to limit current between the first well and the substrate.

REFERENCES:
patent: 6914791 (2005-07-01), Park et al.
patent: 2004/0079999 (2004-04-01), Shibata et al.
patent: WO-02052649 (2002-04-01), None

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