Patent
1978-05-19
1979-04-03
Wojciechowicz, Edward J.
357 41, 357 52, 357 55, 357 59, 357 92, H01L 2702
Patent
active
041480554
ABSTRACT:
An integrated circuit having two vertical complementary bipolar transistors formed from a semiconductor substrate of a first conductivity type, and a deposited layer of second semiconductor type is disclosed. Conductor tracks consisting of portions of the semiconductor layer are supported by a dielectric, while other portions of the semiconductor layer are used for the contacts for certain active zones of the transistors.
REFERENCES:
patent: 3617827 (1971-11-01), Schmitz et al.
patent: 3977019 (1976-08-01), Matsushita et al.
patent: 3978515 (1976-08-01), Evans et al.
Biet Jean-Pierre H.
DE Brebisson Michel
Decrouen Jean-Michel
Edlinger Wolfgang F. J.
Briody Thomas A.
Cannon, Jr. James J.
U.S. Philips Corporation
Wojciechowicz Edward J.
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