Integrated circuit having buffering circuitry with slew rate con

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Slope control of leading or trailing edge of rectangular or...

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327108, 327541, H03K 512

Patent

active

060669713

ABSTRACT:
Buffering circuitry (10) uses pull-up slew rate control circuitry (12) and pull-down slew rate control circuitry (14) to control the rising and falling slew rates of an output signal (50) provided by buffering circuitry (10). Pull-up slew rate control circuitry (12) and pull-down slew rate control circuitry (14) may be used in an embodiment of buffering circuitry (10) which provides a higher output voltage VHIGH than the standard power voltage VPOWER which is used to power most of the circuitry. Buffering circuitry (10) utilizes distributed resistive elements (89-91) to provide improved electrostatic discharge protection. Buffering circuitry (10) utilizes a low power level shifter (16). Voltage reference generation circuitry (18) may be used to provide a stable low power reference voltage VREF (42).

REFERENCES:
patent: 4394590 (1983-07-01), Honda
patent: 4634894 (1987-01-01), Shu et al.
patent: 4970420 (1990-11-01), Billings
patent: 5095226 (1992-03-01), Tani
patent: 5506535 (1996-04-01), Ratner
patent: 5537067 (1996-07-01), Carvajal et al.
patent: 5546029 (1996-08-01), Koke
patent: 5796296 (1998-08-01), Krzentz

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