Integrated circuit having a built-in self test design

Details Integrated circuit having a built-in self test design Integrated circuit having a built-in self test design

1985-12-04

1988-02-09

Eizensopf, Reinhard J.

Electricity: measuring and testing

Plural, automatically sequential tests

324158R, 371 25, 371 24, G06F 1100

Patent

active

047243805

ABSTRACT:
An integrated circuit having a built-in self test design, the integrated circuit including a combinatorial logic circuit, a first register coupled to an output of the combinatorial logic circuit and a feedback path via which output signals from the first register are fed back to an input of the combinatorial logic circuit. A multiplexer is provided between the first register and the feedback path, and there is also provided a second register responsive to a signal which is originated to initiate a test function for feeding test signals via the multiplexer and the feedback path to the input of the combinatorial logic circuit.

REFERENCES:
patent: 3761695 (1973-09-01), Eichelberger
patent: 4567593 (1986-01-01), Bashaw
E. J. Peabody, "System Level Self-Test Method", IBM Technical Disclosure Bulletin; vol. 26, No. 1, Jun. 1983, p. 333.

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