Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage
Reexamination Certificate
1999-12-28
2002-05-14
Tran, Toan (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific identifiable device, circuit, or system
With specific source of supply or bias voltage
C327S336000
Reexamination Certificate
active
06388505
ABSTRACT:
TECHNICAL FIELD
The present invention relates to an integrated circuit generator that generates a linear voltage ramp having a low raise, and more specifically to a battery and battery charging system in particular for use with cellular telephony.
BACKGROUND OF THE INVENTION
In particular but not exclusively, the invention relates to an integrated circuit for cellular telephony applications and the following description is made with reference to this field of application, only in order to simplify its illustration. Discussion of processes and devices well known to those skilled in the art has been abbreviated or eliminated for brevity.
When the battery of the mobile phone equipment has run down, it is very important to charge it with a constant current and having a lower value than that provided by the battery-charger. When the battery reaches a voltage value where it can again operate the phone, it is best charged in (Pulse Width Modulation) PWM mode, i.e., with the maximum current available from the battery charger, but with a frequency and a duty cycle that are managed by a microprocessor MP.
Because of the above considerations, a charging slew rate for the battery must be controlled to about 600 mA/ms, in order to avoid the possibility that a quick current rise may interrupt the communication.
A known solution, disclosed in the European Patent number 0 881 770, in the name of the Applicant, and incorporated by reference, is shown in FIG.
1
. In particular, in the circuit
1
of
FIG. 1
, a voltage signal is used (VRAMP) having a controlled rising and falling edges: This voltage signal VRAMP is converted to a current signal (IR) that is then mirrored at the output of the device (IO) on a power transistor, thus obtaining a precise control of the leading edge current signal of the transistor.
In circuit
1
, hence, a MOS transistor is used in order to obtain low signal propagation times between input and output and a very precise control of the output current and of the switching signal edges.
Circuit
1
is inserted between a battery-charger, schematically indicated with
2
and represented by a current generator connected to a VCH terminal, and a battery
3
connected to a VBAT terminal. It is possible to distinguish in the circuit
1
the following circuit portions: a power transistor PW of MOS type having a Drain-Source main conduction path connected between the VCH and VBAT terminals of the circuit; a drive circuit
12
of the power transistor PW including an operational amplifier OP
1
, fed by a positive voltage VCP higher than the voltage of terminal VCH, and a transistor PS coupled to the power transistor PW; a voltage-current converter block
11
having an operational amplifier OP
2
, a transistor N
2
and a resistance R
2
, with the task of converting a voltage waveform VRAMP at its positive input in a current waveform I
R
proportional to the value of the resistance R
2
; a variable voltage generator with controlled signal edges VRAMP comprising a current generator I
1
and a low-pass filter, schematically illustrated by a capacitor C
1
.
An analysis of the generation of the current I
R
is as follows. The value set on the current generator I
1
is filtered by the low-pass filter C
1
obtaining a voltage signal VRAMP with controlled signal edges. By means of the voltage-current converter block
11
, the voltage VRAMP, applied at a non-inverting input of the operational OP
2
, is converted in a current I
R
, with a time pattern the same as the signal VRAMP, and whose value is inversely proportional to the resistance R
2
.
The current slew rate is defined by the following equation:
Δ
I
0
Δ
t
=
n
×
Δ
I
R
Δ
t
=
n
×
Δ
V
RAMP
Δ
t
×
1
R2
=
n
×
I1
C1
×
1
R2
(
1
)
wherein n is the area ratio of the transistors PS and PW.
The current I
R
is multiplied by the area ratio of the transistors PS and PW generating the output current I
O
supplied to the battery
3
. The operational amplifier OP
1
has the function of driving the gate node VG of the transistors PS and PW in order to maintain the current ratio I
O
/I
R
set by the area ratio n between PS and PW.
The charge current leading signal edges of the battery are controlled by means of such circuit; therefore it is possible to adjust the slew rate in accordance to the application.
In the field of cellular telephony, the current slew rate required is 600 mA/ms; if n=1000 and R
2
=500&OHgr;, it is necessary to generate a voltage ramp &Dgr;VRAMP/&Dgr;t=300 mV/ms.
One way of generating such linear voltage ramp is that of loading a capacitance with a constant current I; in such a case, if I=1 &mgr;A, a capacitance C=3.33 nF is required.
Circuit
1
of known type generates the required voltage ramp in that it loads a capacitance C
1
by means of a constant current generator. The disadvantage of such solution is that the capacitance C
1
cannot be integrated because of its very high value, which is necessary for obtaining very slow voltage ramps as required by the specific application.
SUMMARY OF THE INVENTION
Embodiments of the invention include a voltage generator circuit that can be completely integrated and provides a very slow linear voltage ramp for use with cellular telephony, having structural and functional features that overcome the limitations of the devices realized according to the prior art.
Described is a “storage” capacitance that is loaded “packet-wise” by means of a “pumping” capacitance, which is in turn loaded with always the same voltage reference and clock frequency.
Thus provided is a generating circuit that has an input terminal connected to a first voltage reference, and that has an output terminal for providing a controlled ramp signal (V
RAMP
). The generating circuit has at least one operational amplifier coupled to the input terminal and held in a feedback loop. The generating circuit has a first storage capacitor connected between the non-inverting input terminal of the operational amplifier and a ground reference, and loaded by a second pumping capacitance inserted in parallel to the first capacitance between the input terminal of the ramp generator circuit and the ground reference.
The features and the advantages of the device according to the invention will result from the following description of an embodiment thereof which is reported for indicative and non limiting purposes, with reference to the attached drawings.
REFERENCES:
patent: 4986919 (1991-01-01), Allington
patent: 5760623 (1998-06-01), Hastings
patent: 5774390 (1998-06-01), Tailliet
patent: 5982223 (1999-11-01), Park et al.
patent: 6016073 (2000-01-01), Ghilardelli et al.
patent: 6037622 (2000-03-01), Lin et al.
patent: 0 653 841 (1995-05-01), None
patent: 0 745 996 (1996-12-01), None
patent: 0 881 770 (1998-12-01), None
patent: 2 752 114 (1998-02-01), None
Milazzo Patrizia
Pulvirenti Francesco
Ribellino Calogero
Donohue Michael J.
Jorgenson Lisa K.
Nguyen Linh
Seed IP Law Group PLLC
STMicroelectronics S.r.l.
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