Integrated circuit fusing technique

Details Integrated circuit fusing technique Integrated circuit fusing technique

1976-10-18

1977-06-28

James, Andrew J.

Communications: electrical

Land vehicle alarms or indicators

Internal alarm or indicator responsive to a condition of the...

357 68, 357 71, 357 28, 340166R, 29574, H01L 2702, H01L 2348, H01L 2944, H01L 2952

Patent

active

040329496

ABSTRACT:
A fusing technique whereby a fuse is fabricated upon a substrate by integrated circuit techniques. Three or more layers of chemically dissimilar metals are depositedupon the region where the fuse is to be formed. The top layers are then etched away from the region where the fusible link is to be formed leaving the lower two layers, the top one of which forms the actual fusible link. The lower layer is then etched away leaving the fusible link suspended from the underlying substrate. The current necessary to cause such a fuse to blow is consistent from fuse to fuse since the physical dimensions of the fusible link can accurately be controlled with the integrated circuit techniques used and, since the fusible link is not in contact with the substrate, the rate at which heat is conducted away from the fusible link cannot vary from fuse to fuse. The method is used to advantage in microwave power and oscillator diode circuits such as those used in phasedarray radar systems and in read only memories and memory reconfiguration applications, as well as other semiconductor fusing applications.

REFERENCES:
patent: 3555365 (1971-01-01), Forlani et al.
patent: 3558989 (1971-01-01), Dameme
patent: 3564354 (1971-02-01), Aoki et al.
patent: 3619725 (1971-11-01), Soden
patent: 3723833 (1973-03-01), Wheatley
patent: 3792319 (1974-02-01), Tsang
patent: 3930304 (1976-01-01), Keller et al.

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