Integrated circuit free from accumulation of duty ratio errors

Computer graphics processing and selective visual display system – Display driving control circuitry

Reexamination Certificate

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Details

C345S690000, C345S098000, C345S084000

Reexamination Certificate

active

10335925

ABSTRACT:
An integrated circuit includes a first signal-inversion switching circuit which receives a signal supplied from an exterior thereof as a first input signal, followed by outputting the first input signal after logic inversion thereof in response to a first state of a switching signal and outputting the first input signal without logic inversion in response to a second state of the switching signal, a signal processing circuit which performs signal processing based on the output of the first signal-inversion switching circuit, and a second signal-inversion switching circuit which receives the output of the first signal-inversion switching circuit passing through the signal processing circuit as a second input signal, followed by outputting the second input signal after logic inversion thereof in response to the second state of the switching signal and outputting the second input signal without logic inversion in response to the first state of the switching signal.

REFERENCES:
patent: 5712652 (1998-01-01), Sato et al.
patent: 5990857 (1999-11-01), Kubota et al.
patent: 6344843 (2002-02-01), Koyama et al.
patent: 6380918 (2002-04-01), Chiba et al.
patent: 2002/0075248 (2002-06-01), Morita et al.
patent: 1246698 (2000-03-01), None
patent: 11-17544 (1999-01-01), None
patent: 11-194748 (1999-07-01), None
patent: 2001-166750 (2001-06-01), None
patent: 2001-265288 (2001-09-01), None

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