Integrated circuit for testing a plurality of 1H memories

Details Integrated circuit for testing a plurality of 1H memories Integrated circuit for testing a plurality of 1H memories

1994-05-06

1996-11-12

Metjahic, Safet

Television

Monitoring, testing, or measuring

348714, H04N 1700

Patent

active

055744990

ABSTRACT:
An IC for processing video signals includes a test signal generator for producing a test signal PT synchronized with a horizontal synchronizing signal HS, a distributor responsive to the test signal PT for supplying, at points of time t2, t3, and t4, 1H memories with associated test signals PTA, PTB, and PTC each having the same duration time T2 and number of pulses as those of the test signal PT, a counter for obtaining the duration time T2 and the number of pulses for each of the test signals PTA, PTB, and PTC, a counter for generating the duration time T2 and the number of pulses for each of delayed test signals PHA, PHB, and PHC, and a collating circuit for achieving collating between the values obtained from the counters.

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