Static information storage and retrieval – Floating gate – Multiple values
Patent
1995-10-06
1997-11-11
Nelms, David C.
Static information storage and retrieval
Floating gate
Multiple values
36518905, 36523003, 36518519, G11C 1604
Patent
active
056871147
ABSTRACT:
An integrated circuit storing multiple bits per memory cell is described. The amount of charge stored in a memory cell corresponds the multiple bits in a memory cell. Dual banks of shift registers are alternately coupled to one or more data pins and to the memory cells of the memory array speed data transfer for reading and writing operation. Reading is performed in the voltage mode to conserve power. During writing operations, reading of a memory cell is performed in the voltage mode to determine whether the desired programming of the memory cell has been achieved. During the reading of a memory cell, the voltage corresponding to the amount of charge stored in a memory cell is compared against a binary search sequence of reference voltages to determine the multiple bits stored in the memory cell.
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Agate Semiconductor, Inc.
Nelms David C.
Tran Michael T.
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