Integrated circuit etching of silicon nitride and polysilicon us

Details Integrated circuit etching of silicon nitride and polysilicon us Integrated circuit etching of silicon nitride and polysilicon us

1991-10-23

1993-06-01

Fourson, George

Fishing, trapping, and vermin destroying

437 69, 437228, H01L 2176

Patent

active

052159302

ABSTRACT:
A process for removing both the silicon nitride layer and polysilicon layer in a poly-buffered LOCOS process which utilizes hot phosphoric acid is disclosed.

REFERENCES:
patent: 5002898 (1991-03-01), Fritzenger et al.
"A New Deglaze Process for Doped Polysilicon," L. Lowell, Solid State Technology, Apr. 1991, pp. 149-153.
Poponiak, M., "Forming Dielectric Isolation", IBM Technical Disclosure Bulletin, vol. 20, No. 4, Sep. 1977, p. 1405.

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