Static information storage and retrieval – Floating gate – Particular biasing
Patent
1993-06-30
1995-08-08
Popek, Joseph A.
Static information storage and retrieval
Floating gate
Particular biasing
365 53, 365104, 365218, 257314, 257315, 257323, G11C 1134
Patent
active
054405106
ABSTRACT:
An integrated circuit unerasable memory cell which includes at least one memory cell consisting of a floating gate transistor with drain, source, and gate terminals, and a metallic shield embedded in the semiconductor substrate and covering the cell. Also provided are a diffused region defining a closed loop path on the substrate surface all around the transistor, and having said shield connected peripherally thereto in an unbroken fashion, and first and second wells extending in the substrate from the transistor to outside the diffused region, the first of said wells being connected directly to the gate terminal of the transistor. A contact inside the shield connects the shield's top surface to the cell's source. A protection diode (inside the shield) prevents charging of the floating gate during manufacture.
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Camerlenghi Emilio
Caprara Paolo
Formby Betty
Groover Robert
Niranjan F.
Popek Joseph A.
SGS-Thomson Microelectronics S.R.L.
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