Integrated circuit dual port static memory cell

Details Integrated circuit dual port static memory cell Integrated circuit dual port static memory cell

1987-12-14

1989-04-18

Hecker, Stuart N.

Static information storage and retrieval

Format or disposition of elements

365156, 365190, 365230, 365181, 357 42, G11C 502, G11C 1140, H01L 2702

Patent

active

048233145

ABSTRACT:
A CMOS dual port RAM cell is disclosed wherein one of the word lines is parallel to one of the bit lines in the cell. One bit line is accessed through a p-channel transistor while the other bit lines are accessed through n-channel transistors. This configuration permits the cell to use a single well, thus permitting higher density.

REFERENCES:
patent: 4435787 (1984-03-01), Yasuoka
patent: 4481524 (1984-11-01), Tsujide
patent: 4524377 (1985-06-01), Eguchi
patent: 4541076 (1985-09-01), Bowers et al.
patent: 4581623 (1986-04-01), Wang
patent: 4623989 (1986-11-01), Blake

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