Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor – With peripheral feature due to separation of smaller...
Reexamination Certificate
2007-06-26
2007-06-26
Zarneke, David A. (Department: 2891)
Active solid-state devices (e.g., transistors, solid-state diode
Physical configuration of semiconductor
With peripheral feature due to separation of smaller...
C257SE23137
Reexamination Certificate
active
11002098
ABSTRACT:
An edge seal for a chip with integrated circuits. A first metal line extends along a periphery of the chip, with a first inter-metal dielectric layer on the first metal line. A second metal line overlies the first inter-metal dielectric layer and extends along the periphery of the chip. A plurality of first metal plugs in the first inter-metal dielectric layer connects the first metal line and the second metal line and at least one first metal wall in the first inter-metal dielectric layer is laterally adjacent to a periphery of the first metal line.
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Birch & Stewart Kolasch & Birch, LLP
Taiwan Semiconductor Manufacturing Co. Ltd.
Zarneke David A.
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