Integrated circuit device with an improved interconnection line

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357 67, H01L 2354

Patent

active

048168955

ABSTRACT:
A semiconductor device including interconnection lines for connecting element regions is disclosed. Each of interconnection lines is comprised of a first layer consisting essentially of aluminum, an alumina film formed on the first layer and a second layer containing silicon and deposited on the alumina film. Refractory metal silicide such as tungsten silicide, molybdenum silicide, titanium silicide, tantalum silicide and chrominum silicide is favorably employed as the second layer. Hillock formation and electromigration are thus prevented or suppressed.

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Ryoichi Tomoziki, Flattening in Multi-Layer WIRING, SEMICONDUCTOR WORLD, Oct. 1984, pp. 116-120; translation attached in 357/67S.

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