Integrated circuit device with a vertical JFET

Details Integrated circuit device with a vertical JFET Integrated circuit device with a vertical JFET

2007-01-16

2007-01-16

Doan, Theresa T. (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Regenerative type switching device

Combined with field effect transistor

C257S135000

Reexamination Certificate

active

10678028

ABSTRACT:
We disclose the structure of a JFET device, the method of making the device and the operation of the device. The device is built near the top of a substrate. It has a buried layer that is electrically communicable to a drain terminal. It has a channel region over the buried layer contacting gate regions that connect to a gate terminal. The channel region, of which the length spans the distance between the buried layer and a source region, is connected to a source terminal. The device current flows in the channel substantially perpendicularly to the top surface of the substrate.

REFERENCES:
patent: 4338618 (1982-07-01), Nishizawa
patent: 4404575 (1983-09-01), Nishizawa
patent: 6657255 (2003-12-01), Hshieh et al.
Pending U.S. Appl. No. 10/623,230, Howard et al. “Double Diffused Vertical JFET”.
Pending U.S. Appl. No. 10/614,840, Howard et al. “Implant-Controlled-Channel Vertical JFET”.

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