Integrated circuit device, semiconductor memory, and integrated

Details Integrated circuit device, semiconductor memory, and integrated Integrated circuit device, semiconductor memory, and integrated

1997-12-15

1998-11-17

Nelms, David C.

Static information storage and retrieval

Addressing

Sync/clocking

36518905, 365194, 365226, 36523008, G11C 800, G11C 700

Patent

active

058386300

ABSTRACT:
An input buffer circuit includes a first amplifier causing a first change in an output signal by detecting a rising edge of an input signal, a second amplifier causing a second change in the output signal by detecting a falling edge of the input signal, and a feedback path feeding back the output signal as a feedback signal to the first amplifier and the second amplifier. The feedback signal controls the second amplifier such that a timing of the first change only depends on the first amplifier, and controls the first amplifier such that a timing of the second change only depends on the second amplifier.

REFERENCES:
patent: 5608687 (1997-03-01), Komarek et al.
patent: 5612925 (1997-03-01), Toda et al.
patent: 5636176 (1997-06-01), Hashimoto et al.
patent: 5694371 (1997-12-01), Kawaguchi

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