Excavating
Patent
1994-10-19
1996-12-03
Canney, Vincent P.
Excavating
395800, G06F 1100
Patent
active
055815626
ABSTRACT:
An integrated circuit (IC) device implemented according to an architectural design that specifies that the IC device is required to have one functional module, to perform a first function, connected to another functional module, to perform a second function. The IC device includes a first IC chip having a plurality of first functional modules implemented thereon. Some of the first functional modules are defective and others of the first functional modules are non-defective. At least one of the non-defective first functional modules is operable to perform the first function. The IC device also includes a second IC chip having a plurality of second functional modules implemented thereon. Some of the second functional modules are defective and others of the second functional modules are non-defective. At least one of the non-defective second functional modules is operable to perform the second function. The IC device further includes a bus, a first tri-state gate to electrically connect the non-defective first functional module to the bus, and the second tri-state gate to electrically connect the non-defective second functional modules to the bus.
REFERENCES:
patent: 4448354 (1984-12-01), Chan et al.
patent: 4527234 (1985-06-01), Bellay
patent: 4635218 (1987-01-01), Widdoes, Jr.
patent: 4644487 (1987-02-01), Smith
patent: 4811201 (1989-03-01), Rau et al.
patent: 4868770 (1989-09-01), Smith et al.
patent: 4872126 (1989-10-01), Premerlani et al.
patent: 4937827 (1990-06-01), Beck et al.
patent: 5006981 (1991-04-01), Beltz
patent: 5051938 (1991-09-01), Hyduke
patent: 5084824 (1992-01-01), Lam et al.
patent: 5224055 (1993-06-01), Grundy et al.
patent: 5253181 (1993-10-01), Marui et al.
patent: 5263149 (1993-11-01), Winlow
Advanced Microprocessors by Daniel Tabak .COPYRGT.1991 by McGraw-Hill Inc. p. 42.
Liu et al., "A CMOS Cell Library Design For Testability", VLSI Systems Design, vol. 8, No. 5, pp. 58-60, and 65, May 1987.
Furber, Stephen B., "VLSI RISC Architecture and Organization", Marcel Dekker, Inc., pp. 23-26, 1989.
Maliniak, Lisa, "System Simulation Still Holds Promise", Electronic Design, pp. 53-61, Feb. 6, 1992.
Gosch, "Function Blocks Speed Up Chip Development", Electronic Design, pp. 101-108, May 1, 1992.
Ho Wai-Yan
Lin Chong M.
Nguyen Le T.
Canney Vincent P.
Seiko Epson Corporation
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