Integrated circuit device having internal dampening for a plural

Details Integrated circuit device having internal dampening for a plural Integrated circuit device having internal dampening for a plural

1982-01-15

1984-06-12

James, Andrew J.

357 51, 357 70, 357 72, 357 80, H01L 2316, H01L 2702, H01L 2348, H01L 2328

Patent

active

044545290

ABSTRACT:
The present invention is directed to an integrated circuit device comprising a lead frame having a ceramic capacitor mounted thereon and forming the support for a silicon chip bearing a multiplicity of circuits, including at least two power supply circuits namely a main power supply circuit and a secondary circuit. The capacitor is shunted across the terminals of the main power supply and the main power terminals of said IC chip. A conductive layer disposed atop the ceramic uppermost layer of the capacitor defines with the uppermost electrode of the capacitor, a second capacitive load of lesser value than the main capacitor, the said second capacitive load being shunted across the terminals of the secondary power supply and a secondary set of power terminals of said chip. The provision of internal capacitive shunting for the plurality of power supplies for the chip enables lead length to the capacitors to be maintained at a minimum thereby minimizing inductive reactance and thus enabling small capacitances to effectively dampen noise and pulses in the circuit.

REFERENCES:
patent: 3617817 (1979-11-01), Kawakatsu et al.
patent: 3866311 (1975-02-01), Salles et al.
patent: 3942245 (1976-03-01), Jackson et al.
patent: 4079511 (1978-03-01), Grabbe
patent: 4200880 (1980-04-01), Frey
patent: 4234666 (1980-11-01), Gursky
patent: 4249196 (1981-02-01), Durney et al.
patent: 4303934 (1981-12-01), Stitt

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