Integrated circuit device having improved junction connections

Details Integrated circuit device having improved junction connections Integrated circuit device having improved junction connections

1990-10-23

1992-06-09

Jackson, Jr., Jerome

357 67, 357 42, H01L 2954, H01L 2350

Patent

active

051211866

ABSTRACT:
A method for forming a contact to a selective region of an integrated circuit characterized by the steps of: forming a layer of refractory metal over and around the selected region; forming a layer of amorphous silicon over the layer of refractory metal; patterning the amorphous silicon in to an elongated strip which extends away from the selected region; annealing the integrated circuit to convert the strip of amorphous silicon into a silicide path; and removing the unreacted refractory metal. The method of the present invention can be used to extend a contact to the source, drain, or gate of a MOSFET from the top of an adjacent section of field oxide, and can also be used as a method for local interconnection of IC devices, such as CMOS devices.

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Shya P. Murarka, David B. Fraser, Ashok K. Sinha, and H. L. Levinstein, "Refractory Silicides of Titanium and Tantalum for Low-Resistivity Gates and Interconnects", IEEE Journal of Solid-State Circuits, vol. Sc. 18, No. 4, Aug. 1980.
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"Ohmic Contacts for Small, Shallow Structure Devices", IBM Technical Disclosure Bulletin, vol. 22, No. 4, Sep. 1979.
S. P. Muraka, "Refractory Silicides for Integrated Circuits,", S. P. Muraka, J. Vac., Sci. Technol, q7(4), Jul.-Aug. 1980.

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