Integrated circuit device having I/O structures with reduced...

Details Integrated circuit device having I/O structures with reduced... Integrated circuit device having I/O structures with reduced...

2006-03-14

2006-03-14

Pham, Hoai (Department: 2891)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

With contact or lead

C257S784000

Reexamination Certificate

active

07012330

ABSTRACT:
The present invention is an input/output (I/O) structure for an integrated circuit device which increases the input signal energy transfer characteristic and allows for increased operating frequency of the device. The I/O structure includes a conductive region in a doped region below a semiconductor bond pad. The I/O structure also includes a tapped region coupled to a supply voltage. The I/O structure may also include an output driver transistor layout with a tapped source region to decrease a parasitic series resistance between a drain region and a source voltage.

REFERENCES:
patent: 5751015 (1998-05-01), Corbett et al.
patent: 5861659 (1999-01-01), Okabe
patent: 6097066 (2000-08-01), Lee et al.
patent: 6329694 (2001-12-01), Lee et al.
patent: 60000769 (1985-01-01), None
Adel S. Sedra and Kenneth C. Smith, Microelectronic Circuits 1998, Oxford University Press, 4thEdition, pp. 358-359.
“A Partial Design Analysis of The Samsung KM416H4031T-G10 4Mx16 Double Data Rate SDRAM”, Semiconductor Insights Inc., Mar. 1999.

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